Praveen Mayakar

Hardware-Software Designer-Developer

Motivated to excel in the field of VLSI, utilizing my experience in embedded systems & System on Chip. An optimistic teamworker with good presentation skills. Entrepreuner, freelance web designer, blogger and freelance photographer.

Synopsis of work at

Lund University

as a student in System on Chip

2007 to 2011

As a master student at Lunds Tekniska högskola (LTH), Sweden, i have gained skills in various aspects of digital hardware design while extending my domain knowledge to hardware software design from software design. Have pursued challenging projects in Digital IC Design, Embedded systems and DSP. Also was part of  NXP sponsored student trip to Netherlands.

Key Responsibilities:


Effective Implementation of hardware accelerated realtime kernel on FPGA


 Dec'11 - June'11

Prepared a state of the art for the Real time kernel Sierra. Implemented and investigated new methods of using device drivers and effective data structures to facilitate easy implementation of an application using the Sierra APIs. Investigated optimizations in hardware acceleration. The project was done for AGSTU AB, Vasteras.

Programming Language: C & VHDL
Tools: Altera, Xilinx & Eclipse
Team Size: 1

Mixed Radix FFT/IFFT

Hardware Designer

Oct'11 - Dec'11

Implementation using an effective architecture mixed radix FFT/IFFTs on hardware. FFT2, FFT3 & FFT5 are implemented. A Radix 2 FFT implementation with SDF architecture was done and validated. The project was a requirement of a larger project used for Channel estimation for LTE standards worked on building various embedded systems with C as the language. Development and maintenance of projects.

Programming Language: VHDL
Tools: Synopsys Design vision, SoC Encounter, Modelsim & Matlab
Team Size: 2

Implementation of matrix multiplier for 130nm


Hardware Designer

Oct'09 - Dec'09

A (4x3) input matrix was multiplied with a coefficient matrix of order (3x4). The coefficient values were read from ROM and the product matrix was written on a RAM. The design was optimized for speed and the implementation used 17 clock cycles and operated at 188Mbps. The approach towards the project was very modular and structured.

Programming Language: VHDL
Tools: Synopsys Design Vision, SoC Encounter, Modelsim & Matlab
Team Size: 2

Cepstrum analysis of vocal signal

Designer & Developer

Jan'09 - Mar'09

The project's objective was to develop a program which estimates the pitch of a person singing into a microphone. The audio samples were processed using the concept of cepstrum-analysis to extract the fundamental frequency from the harmonics. With an initial concept of having to estimate the pitch of a singer and compare it with that of the original singer's pitch. In the end an implementation of cepstrum analysis as a pitch estimation algorithm was created.

Programming Language:
Tools: Code composer studio & Matlab
Team Size: 2

Implementation of Network Attached Storage 

system on Spartan board


Aug'08 - Oct'08

The objective of the project was to implement a network attached storage system where in a flash based storage will be accessible from the UART as well as through the network, via FTP. A Spartan 3 Board was used with the on board LCD display to make a menu based accessible system. We had two subsystems independently working viz., running linux version on the board and a LCD controller and driver with PS2 controller.

Programming Language: C & VHDL
Tools:  Xilinx EDK, Xilinx XPS & PetaLinux
Team Size: 4

Implementation of Block floating point scaling

using Cellular neural networks

Hardware Designer

Oct'07 - Jan'08

This project aimed at building a cellular neural network node which operates with a data path of 8 bits (21 bits in ALU). The computational aspects of the data path are then trimmed to fit the BRAM blocks of 8 bit wide. Further the project aimed at building a network of such nodes which would communicate the data processed within each. Implementation of the node was done. A template function which has tanh functionality was processed by the ALU and the data trimmed to 8 bits to fit into the memory. 

Programming Language: VHDL
Tools: Xilinx ISE & Matlab
Team Size: 2

Implementation of cursor movement on a screen

using FPGA


Aug'07 - Oct'07

This project was a part of the course “Introduction to structured VLSI” from the first semester. The objective of the project was to implement cursor motion by controlling the input signals of an onboard VGA controller controlled through a FPGA. The project involved building schematics, state machines and coding in VHDL to achieve the functionalities to move the cursor using the arrow keys of the keyboard connected through serial interface. The VGA monitor had to be filled with a background color and a multi-colored cursor (both controlled and generated by the state machines) and when the cursor is moved the background color had to be retained.

Programming Language: VHDL
Tools: EASE, Synplify & Modelsim
Team Size: 2