Xilinx has launched their latest version of Xilinx ISE Design Suite for FPGA platforms. The new version boasts earlier bug fixes, support for Spartan-6 smart clock gating and reduction in Dynamic power by 30 %. Also comes with Plan Ahead with a new visualisation and analysis flow. The new version is available for Windows and Linux Platforms for download at Xilinx website. Download

One important note that I learned by attending the Xilinx University program during the FPGAWorld Conference in Denmark this year (2010) is that, this version is better than all previous versions when it comes to support. Petalinux porting is fairly easier with this version. We had a demonstration of how easy it is to port petalinux especially after petalinux has made changes and made it fairly easier to work with Cent OS. We ported it on Spartan 6 boards.

What is disappointing to me is that this version onwards Xilinx will not support their Xilinx virtex 2 Pro boards. There are around 6000 boards in the market most given away under the university program. I would like to try to port Linux on my X2V2P board but i will have to use the earlier 10.1 version that i have access to. My earlier attempts have failed due to petalinux issues and less support or help available for Virtex 2 boards specifically. I will come up with a short article once i am able to get through that hurdle.